The JTAG-HS3 is the newest member of our family of affordable high-speed Xilinx® FPGA programming solutions. The HS3 builds on the successful JTAG-HS1 by adding an open-drain buffer to pin 14 allowing for the debugging of Xilinx Zynq-SOC processors. It can be attached to target boards using Xilinx’s 2×7 connector*, and is compatible with all Xilinx tools, including iMPACT™, ChipScope™, and EDK.
When connected to a PC via a standard A to micro-USB cable, the JTAG HS3 receives its power from USB and can be recognized as a Digilent programming cable, even if the HS3 is not attached to the target board. The JTAG bus can be shared with other devices as the HS3’s signals are held in high-impedance, except when actively driven during programming. The HS3 is small and light, allowing it to be held firmly in place by the system board connector.
* This is a unique programming header and is not compatible with the 1×6 MTE Digilent JTAG Connector.
This cable is not needed for Digilent FPGA boards as our boards are designed with integrated programming circuitry.